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某工作站采用时钟频率f为15MHz,处理速率为10MIP/S的处理机来执行一个已知混合程序。假定每次存储器存取为1周期延迟,此计算机的有效CPI是(2),假定将处理机的时钟频率f提高到30MHz,但存储器子系统速率不变。这样,每次存储器存取需要两个时钟周期,如果30%指令每条只需要一次存储存取,而另外5%每条需要两次存储存取,还假定已知混合程序的指令数不变,并与原工作站兼容,则改进后的处理机性能(3)。

  • A.3
  • B.1.6
  • C.0.725
  • D.1.5
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